ND DDR4 SDRAM – Initialization, Training and Calibration (www.systemverilog.io)
148 points by ivank 2303 days ago | 22 comments on HN ~lite vlite-2.0
Summary ~lite
Technical article on DDR4 SDRAM initialization, training, and calibration.
Lite evaluation by llama-4-scout-wai-psq · editorial channel only · no per-section breakdown available
Longitudinal · 2 evals
+1 0 −1 HN
Audit Trail 5 entries
2026-03-19 01:51 eval_success PSQ evaluated: g-PSQ=-0.040 (3 dims) - -
2026-03-19 01:51 eval Evaluated by llama-4-scout-wai-psq: -0.04 (Neutral)
2026-03-19 01:48 eval_success Lite evaluated: Neutral (0.00) - -
2026-03-19 01:48 rater_validation_warn Lite validation warnings for model llama-4-scout-wai: 1W 0R - -
2026-03-19 01:48 eval Evaluated by llama-4-scout-wai: 0.00 (Neutral)
reasoning
Technical article on DDR4 SDRAM initialization, no human rights discussion